Crypto++  8.0
Free C++ class library of cryptographic schemes
Macros
cpu.h File Reference

Functions for CPU features and intrinsics. More...

Go to the source code of this file.

Macros

#define NEW_LINE
 
#define INTEL_PREFIX
 
#define INTEL_NOPREFIX
 
#define ATT_PREFIX
 
#define ATT_NOPREFIX
 
#define CRYPTOPP_CPUID_AVAILABLE   1
 

Functions

IA-32 CPU FEATURES
bool HasSSE2 ()
 Determines SSE2 availability. More...
 
bool HasSSSE3 ()
 Determines SSSE3 availability. More...
 
bool HasSSE41 ()
 Determines SSE4.1 availability. More...
 
bool HasSSE42 ()
 Determines SSE4.2 availability. More...
 
bool HasAESNI ()
 Determines AES-NI availability. More...
 
bool HasCLMUL ()
 Determines Carryless Multiply availability. More...
 
bool HasSHA ()
 Determines SHA availability. More...
 
bool HasADX ()
 Determines ADX availability. More...
 
bool HasAVX ()
 Determines AVX availability. More...
 
bool HasAVX2 ()
 Determines AVX2 availability. More...
 
bool IsP4 ()
 Determines if the CPU is an Intel P4. More...
 
bool HasRDRAND ()
 Determines RDRAND availability. More...
 
bool HasRDSEED ()
 Determines RDSEED availability. More...
 
bool HasPadlockRNG ()
 Determines Padlock RNG availability. More...
 
bool HasPadlockACE ()
 Determines Padlock ACE availability. More...
 
bool HasPadlockACE2 ()
 Determines Padlock ACE2 availability. More...
 
bool HasPadlockPHE ()
 Determines Padlock PHE availability. More...
 
bool HasPadlockPMM ()
 Determines Padlock PMM availability. More...
 
int GetCacheLineSize ()
 Provides the cache line size. More...
 
ARM A-32, Aarch32 and AArch64 CPU FEATURES
bool HasARMv7 ()
 Determine if an ARM processor is ARMv7 or above. More...
 
bool HasNEON ()
 Determine if an ARM processor has Advanced SIMD available. More...
 
bool HasPMULL ()
 Determine if an ARM processor provides Polynomial Multiplication. More...
 
bool HasCRC32 ()
 Determine if an ARM processor has CRC32 available. More...
 
bool HasAES ()
 Determine if an ARM processor has AES available. More...
 
bool HasSHA1 ()
 Determine if an ARM processor has SHA1 available. More...
 
bool HasSHA2 ()
 Determine if an ARM processor has SHA256 available. More...
 
bool HasSHA512 ()
 Determine if an ARM processor has SHA512 available. More...
 
bool HasSHA3 ()
 Determine if an ARM processor has SHA3 available. More...
 
bool HasSM3 ()
 Determine if an ARM processor has SM3 available. More...
 
bool HasSM4 ()
 Determine if an ARM processor has SM4 available. More...
 
POWERPC CPU FEATURES
bool HasAltivec ()
 Determine if a PowerPC processor has Altivec available. More...
 
bool HasPower7 ()
 Determine if a PowerPC processor has Power7 available. More...
 
bool HasPower8 ()
 Determine if a PowerPC processor has Power8 available. More...
 
bool HasPower9 ()
 Determine if a PowerPC processor has Power9 available. More...
 
bool HasSHA256 ()
 Determine if a PowerPC processor has SHA256 available. More...
 
bool HasDARN ()
 Determine if a PowerPC processor has DARN available. More...
 

Detailed Description

Functions for CPU features and intrinsics.

The CPU functions are used in IA-32, ARM and PowerPC code paths. The functions provide cpu specific feature testing on IA-32, ARM and PowerPC machines.

Feature detection uses CPUID on IA-32, like Intel and AMD. On other platforms a two-part strategy is used. First, the library attempts to *Query* the OS for a feature, like using Linux getauxval() or android_getCpuFeatures(). If that fails, then *Probe* the cpu executing an instruction and an observe a SIGILL if unsupported. The general pattern used by the library is:

    g_hasCRC32 = CPU_QueryCRC32() || CPU_ProbeCRC32();
    g_hasPMULL = CPU_QueryPMULL() || CPU_ProbePMULL();
    g_hasAES  = CPU_QueryAES() || CPU_ProbeAES();

Generally speaking, CPU_Query() is in the source file cpu.cpp because it does not require special architectural flags. CPU_Probe() is in a source file that recieves architectural flags, like sse_simd.cpp, neon_simd.cpp and ppc_simd.cpp. For example, compiling neon_simd.cpp on an ARM64 machine will have -march=armv8-a applied during a compile to make the instruction set architecture (ISA) available.

The cpu probes are expensive when compared to a standard OS feature query. The library also avoids probes on Apple platforms because Apple's signal handling for SIGILLs appears to corrupt memory. CPU_Probe() will unconditionally return false for Apple platforms. OpenSSL experienced the same problem and moved away from SIGILL probes on Apple.

Definition in file cpu.h.

Function Documentation

◆ HasSSE2()

bool HasSSE2 ( )
inline

Determines SSE2 availability.

Returns
true if SSE2 is determined to be available, false otherwise

MMX, SSE and SSE2 are core processor features for x86_64, and the function always returns true for the platform.

Note
This function is only available on Intel IA-32 platforms

Definition at line 116 of file cpu.h.

◆ HasSSSE3()

bool HasSSSE3 ( )
inline

Determines SSSE3 availability.

Returns
true if SSSE3 is determined to be available, false otherwise

HasSSSE3() is a runtime check performed using CPUID

Note
This function is only available on Intel IA-32 platforms

Definition at line 131 of file cpu.h.

◆ HasSSE41()

bool HasSSE41 ( )
inline

Determines SSE4.1 availability.

Returns
true if SSE4.1 is determined to be available, false otherwise

HasSSE41() is a runtime check performed using CPUID

Note
This function is only available on Intel IA-32 platforms

Definition at line 142 of file cpu.h.

◆ HasSSE42()

bool HasSSE42 ( )
inline

Determines SSE4.2 availability.

Returns
true if SSE4.2 is determined to be available, false otherwise

HasSSE42() is a runtime check performed using CPUID

Note
This function is only available on Intel IA-32 platforms

Definition at line 153 of file cpu.h.

◆ HasAESNI()

bool HasAESNI ( )
inline

Determines AES-NI availability.

Returns
true if AES-NI is determined to be available, false otherwise

HasAESNI() is a runtime check performed using CPUID

Since
Crypto++ 5.6.1
Note
This function is only available on Intel IA-32 platforms

Definition at line 165 of file cpu.h.

◆ HasCLMUL()

bool HasCLMUL ( )
inline

Determines Carryless Multiply availability.

Returns
true if pclmulqdq is determined to be available, false otherwise

HasCLMUL() is a runtime check performed using CPUID

Since
Crypto++ 5.6.1
Note
This function is only available on Intel IA-32 platforms

Definition at line 177 of file cpu.h.

◆ HasSHA()

bool HasSHA ( )
inline

Determines SHA availability.

Returns
true if SHA is determined to be available, false otherwise

HasSHA() is a runtime check performed using CPUID

Since
Crypto++ 6.0
Note
This function is only available on Intel IA-32 platforms

Definition at line 189 of file cpu.h.

◆ HasADX()

bool HasADX ( )
inline

Determines ADX availability.

Returns
true if ADX is determined to be available, false otherwise

HasADX() is a runtime check performed using CPUID

Since
Crypto++ 7.0
Note
This function is only available on Intel IA-32 platforms

Definition at line 201 of file cpu.h.

◆ HasAVX()

bool HasAVX ( )
inline

Determines AVX availability.

Returns
true if AVX is determined to be available, false otherwise

HasAVX() is a runtime check performed using CPUID

Since
Crypto++ 8.0
Note
This function is only available on Intel IA-32 platforms

Definition at line 213 of file cpu.h.

◆ HasAVX2()

bool HasAVX2 ( )
inline

Determines AVX2 availability.

Returns
true if AVX2 is determined to be available, false otherwise

HasAVX2() is a runtime check performed using CPUID

Since
Crypto++ 8.0
Note
This function is only available on Intel IA-32 platforms

Definition at line 225 of file cpu.h.

◆ IsP4()

bool IsP4 ( )
inline

Determines if the CPU is an Intel P4.

Returns
true if the CPU is a P4, false otherwise

IsP4() is a runtime check performed using CPUID

Note
This function is only available on Intel IA-32 platforms

Definition at line 236 of file cpu.h.

◆ HasRDRAND()

bool HasRDRAND ( )
inline

Determines RDRAND availability.

Returns
true if RDRAND is determined to be available, false otherwise

HasRDRAND() is a runtime check performed using CPUID

Note
This function is only available on Intel IA-32 platforms

Definition at line 247 of file cpu.h.

◆ HasRDSEED()

bool HasRDSEED ( )
inline

Determines RDSEED availability.

Returns
true if RDSEED is determined to be available, false otherwise

HasRDSEED() is a runtime check performed using CPUID

Note
This function is only available on Intel IA-32 platforms

Definition at line 258 of file cpu.h.

◆ HasPadlockRNG()

bool HasPadlockRNG ( )
inline

Determines Padlock RNG availability.

Returns
true if VIA Padlock RNG is determined to be available, false otherwise

HasPadlockRNG() is a runtime check performed using CPUID

Note
This function is only available on Intel IA-32 platforms

Definition at line 269 of file cpu.h.

◆ HasPadlockACE()

bool HasPadlockACE ( )
inline

Determines Padlock ACE availability.

Returns
true if VIA Padlock ACE is determined to be available, false otherwise

HasPadlockACE() is a runtime check performed using CPUID

Note
This function is only available on Intel IA-32 platforms

Definition at line 280 of file cpu.h.

◆ HasPadlockACE2()

bool HasPadlockACE2 ( )
inline

Determines Padlock ACE2 availability.

Returns
true if VIA Padlock ACE2 is determined to be available, false otherwise

HasPadlockACE2() is a runtime check performed using CPUID

Note
This function is only available on Intel IA-32 platforms

Definition at line 291 of file cpu.h.

◆ HasPadlockPHE()

bool HasPadlockPHE ( )
inline

Determines Padlock PHE availability.

Returns
true if VIA Padlock PHE is determined to be available, false otherwise

HasPadlockPHE() is a runtime check performed using CPUID

Note
This function is only available on Intel IA-32 platforms

Definition at line 302 of file cpu.h.

◆ HasPadlockPMM()

bool HasPadlockPMM ( )
inline

Determines Padlock PMM availability.

Returns
true if VIA Padlock PMM is determined to be available, false otherwise

HasPadlockPMM() is a runtime check performed using CPUID

Note
This function is only available on Intel IA-32 platforms

Definition at line 313 of file cpu.h.

◆ GetCacheLineSize()

int GetCacheLineSize ( )
inline

Provides the cache line size.

Returns
lower bound on the size of a cache line in bytes, if available

GetCacheLineSize() returns the lower bound on the size of a cache line, if it is available. If the value is not available at runtime, then 32 is returned for a 32-bit processor and 64 is returned for a 64-bit processor.

x86/x32/x64 uses CPUID to determine the value and it is usually accurate. PowerPC and AIX also makes the value available to user space and it is also usually accurate. The ARM processor equivalent is a privileged instruction, so a compile time value is returned.

Definition at line 328 of file cpu.h.

◆ HasARMv7()

bool HasARMv7 ( )
inline

Determine if an ARM processor is ARMv7 or above.

Returns
true if the hardware is ARMv7 or above, false otherwise.

Some AES code requires ARMv7 or above

Since
Crypto++ 8.0
Note
This function is only available on ARM-32, Aarch32 and Aarch64 platforms

Definition at line 367 of file cpu.h.

◆ HasNEON()

bool HasNEON ( )
inline

Determine if an ARM processor has Advanced SIMD available.

Returns
true if the hardware is capable of Advanced SIMD at runtime, false otherwise.

Advanced SIMD instructions are available under most ARMv7, Aarch32 and Aarch64.

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -mfpu=neon (32-bit) or -march=armv8-a (64-bit). Also see ARM's __ARM_NEON preprocessor macro.

Since
Crypto++ 5.6.4
Note
This function is only available on ARM-32, Aarch32 and Aarch64 platforms

Definition at line 387 of file cpu.h.

◆ HasPMULL()

bool HasPMULL ( )
inline

Determine if an ARM processor provides Polynomial Multiplication.

Determine if a PowerPC processor has Polynomial Multiply available.

Returns
true if the hardware is capable of polynomial multiplications at runtime, false otherwise.

The multiplication instructions are available under Aarch32 and Aarch64.

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -march=armv8-a+crypto; while Apple requires -arch arm64. Also see ARM's __ARM_FEATURE_CRYPTO preprocessor macro.

Since
Crypto++ 5.6.4
Note
This function is only available on Aarch32 and Aarch64 platforms
Returns
true if the hardware is capable of PMULL at runtime, false otherwise.

PMULL is part of the in-crypto extensions on Power8 and Power9.

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -mcpu=power8; while IBM XL C/C++ compilers require -qarch=pwr8 -qaltivec. Also see PowerPC's __CRYPTO preprocessor macro.

Note
This function is only available on PowerPC and PowerPC-64 platforms

Definition at line 408 of file cpu.h.

◆ HasCRC32()

bool HasCRC32 ( )
inline

Determine if an ARM processor has CRC32 available.

Returns
true if the hardware is capable of CRC32 at runtime, false otherwise.

CRC32 instructions provide access to the processor's CRC-32 and CRC-32C instructions. They are provided by ARM C Language Extensions 2.0 (ACLE 2.0) and available under Aarch32 and Aarch64.

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -march=armv8-a+crc; while Apple requires -arch arm64. Also see ARM's __ARM_FEATURE_CRC32 preprocessor macro.

Since
Crypto++ 5.6.4
Note
This function is only available on Aarch32 and Aarch64 platforms

Definition at line 429 of file cpu.h.

◆ HasAES()

bool HasAES ( )
inline

Determine if an ARM processor has AES available.

Determine if a PowerPC processor has AES available.

Returns
true if the hardware is capable of AES at runtime, false otherwise.

AES is part of the optional Crypto extensions on Aarch32 and Aarch64. They are accessed using ARM C Language Extensions 2.0 (ACLE 2.0).

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -march=armv8-a+crypto; while Apple requires -arch arm64. Also see ARM's __ARM_FEATURE_CRYPTO preprocessor macro.

Since
Crypto++ 5.6.4
Note
This function is only available on Aarch32 and Aarch64 platforms
Returns
true if the hardware is capable of AES at runtime, false otherwise.

AES is part of the in-crypto extensions on Power8 and Power9.

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -mcpu=power8; while IBM XL C/C++ compilers require -qarch=pwr8 -qaltivec. Also see PowerPC's __CRYPTO preprocessor macro.

Note
This function is only available on PowerPC and PowerPC-64 platforms

Definition at line 449 of file cpu.h.

◆ HasSHA1()

bool HasSHA1 ( )
inline

Determine if an ARM processor has SHA1 available.

Returns
true if the hardware is capable of SHA1 at runtime, false otherwise.

SHA1 is part of the optional Crypto extensions on Aarch32 and Aarch64. They are accessed using ARM C Language Extensions 2.0 (ACLE 2.0).

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -march=armv8-a+crypto; while Apple requires -arch arm64. Also see ARM's __ARM_FEATURE_CRYPTO preprocessor macro.

Since
Crypto++ 5.6.4
Note
This function is only available on Aarch32 and Aarch64 platforms

Definition at line 469 of file cpu.h.

◆ HasSHA2()

bool HasSHA2 ( )
inline

Determine if an ARM processor has SHA256 available.

Returns
true if the hardware is capable of SHA256 at runtime, false otherwise.

SHA256 is part of the optional Crypto extensions on Aarch32 and Aarch64. They are accessed using ARM C Language Extensions 2.0 (ACLE 2.0).

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -march=armv8-a+crypto; while Apple requires -arch arm64. Also see ARM's __ARM_FEATURE_CRYPTO preprocessor macro.

Since
Crypto++ 5.6.4
Note
This function is only available on Aarch32 and Aarch64 platforms

Definition at line 489 of file cpu.h.

◆ HasSHA512()

bool HasSHA512 ( )
inline

Determine if an ARM processor has SHA512 available.

Determine if a PowerPC processor has SHA512 available.

Returns
true if the hardware is capable of SHA512 at runtime, false otherwise.

SHA512 is part of the ARMv8.4 Crypto extensions on Aarch32 and Aarch64. They are accessed using ARM C Language Extensions 2.0 (ACLE 2.0).

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -march=armv8.4-a+crypto; while Apple requires -arch arm64. Also see ARM's __ARM_FEATURE_CRYPTO preprocessor macro.

Since
Crypto++ 8.0
Note
This function is only available on Aarch32 and Aarch64 platforms
Returns
true if the hardware is capable of SHA512 at runtime, false otherwise.

SHA is part of the in-crypto extensions on Power8 and Power9.

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -mcpu=power8; while IBM XL C/C++ compilers require -qarch=pwr8 -qaltivec. Also see PowerPC's __CRYPTO preprocessor macro.

Note
This function is only available on PowerPC and PowerPC-64 platforms

Definition at line 509 of file cpu.h.

◆ HasSHA3()

bool HasSHA3 ( )
inline

Determine if an ARM processor has SHA3 available.

Returns
true if the hardware is capable of SHA3 at runtime, false otherwise.

SHA3 is part of the ARMv8.4 Crypto extensions on Aarch32 and Aarch64. They are accessed using ARM C Language Extensions 2.0 (ACLE 2.0).

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -march=armv8.4-a+crypto; while Apple requires -arch arm64. Also see ARM's __ARM_FEATURE_CRYPTO preprocessor macro.

Since
Crypto++ 8.0
Note
This function is only available on Aarch32 and Aarch64 platforms

Definition at line 529 of file cpu.h.

◆ HasSM3()

bool HasSM3 ( )
inline

Determine if an ARM processor has SM3 available.

Returns
true if the hardware is capable of SM3 at runtime, false otherwise.

SM3 is part of the ARMv8.4 Crypto extensions on Aarch32 and Aarch64. They are accessed using ARM C Language Extensions 2.0 (ACLE 2.0).

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -march=armv8.4-a+crypto; while Apple requires -arch arm64. Also see ARM's __ARM_FEATURE_CRYPTO preprocessor macro.

Since
Crypto++ 8.0
Note
This function is only available on Aarch32 and Aarch64 platforms

Definition at line 549 of file cpu.h.

◆ HasSM4()

bool HasSM4 ( )
inline

Determine if an ARM processor has SM4 available.

Returns
true if the hardware is capable of SM4 at runtime, false otherwise.

SM4 is part of the ARMv8.4 Crypto extensions on Aarch32 and Aarch64. They are accessed using ARM C Language Extensions 2.0 (ACLE 2.0).

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -march=armv8.4-a+crypto; while Apple requires -arch arm64. Also see ARM's __ARM_FEATURE_CRYPTO preprocessor macro.

Since
Crypto++ 8.0
Note
This function is only available on Aarch32 and Aarch64 platforms

Definition at line 569 of file cpu.h.

◆ HasAltivec()

bool HasAltivec ( )
inline

Determine if a PowerPC processor has Altivec available.

Returns
true if the hardware is capable of Altivec at runtime, false otherwise.

Altivec instructions are available on modern PowerPCs.

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -mcpu=power4; while IBM XL C/C++ compilers require -qarch=pwr6 -qaltivec. Also see PowerPC's _ALTIVEC_ preprocessor macro.

Note
This function is only available on PowerPC and PowerPC-64 platforms

Definition at line 614 of file cpu.h.

◆ HasPower7()

bool HasPower7 ( )
inline

Determine if a PowerPC processor has Power7 available.

Returns
true if the hardware is capable of Power7 at runtime, false otherwise.

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -mcpu=power7; while IBM XL C/C++ compilers require -qarch=pwr7 -qaltivec. Also see PowerPC's _ALTIVEC_ preprocessor macro.

Note
This function is only available on PowerPC and PowerPC-64 platforms

Definition at line 627 of file cpu.h.

◆ HasPower8()

bool HasPower8 ( )
inline

Determine if a PowerPC processor has Power8 available.

Returns
true if the hardware is capable of Power8 at runtime, false otherwise.

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -mcpu=power8; while IBM XL C/C++ compilers require -qarch=pwr8 -qaltivec. Also see PowerPC's _ALTIVEC_ preprocessor macro.

Note
This function is only available on PowerPC and PowerPC-64 platforms

Definition at line 640 of file cpu.h.

◆ HasPower9()

bool HasPower9 ( )
inline

Determine if a PowerPC processor has Power9 available.

Returns
true if the hardware is capable of Power9 at runtime, false otherwise.

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -mcpu=power9; while IBM XL C/C++ compilers require -qarch=pwr9 -qaltivec. Also see PowerPC's _ALTIVEC_ preprocessor macro.

Note
This function is only available on PowerPC and PowerPC-64 platforms

Definition at line 653 of file cpu.h.

◆ HasSHA256()

bool HasSHA256 ( )
inline

Determine if a PowerPC processor has SHA256 available.

Returns
true if the hardware is capable of SHA256 at runtime, false otherwise.

SHA is part of the in-crypto extensions on Power8 and Power9.

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -mcpu=power8; while IBM XL C/C++ compilers require -qarch=pwr8 -qaltivec. Also see PowerPC's __CRYPTO preprocessor macro.

Note
This function is only available on PowerPC and PowerPC-64 platforms

Definition at line 695 of file cpu.h.

◆ HasDARN()

bool HasDARN ( )
inline

Determine if a PowerPC processor has DARN available.

Returns
true if the hardware is capable of DARN at runtime, false otherwise.

Runtime support requires compile time support. When compiling with GCC, you may need to compile with -mcpu=power9; while IBM XL C/C++ compilers require -qarch=pwr9 -qaltivec. Also see PowerPC's _ALTIVEC_ preprocessor macro.

Note
This function is only available on PowerPC and PowerPC-64 platforms

Definition at line 722 of file cpu.h.